Registers vs Combinational Logic

How sensitivity lists distinguish immediate combinational behavior from clocked storage.

Updated 2026-07-10

Combinational logic and registered logic can use the same Boolean expression while behaving differently over time. The expression tells you what value is calculated. The surrounding block tells you when that value can update and whether it is stored.

An always @(*) block describes combinational behavior. Its output is recomputed when an input used by the block changes. A default assignment at the top ensures every path has a value and avoids accidental storage.

An always @(posedge clk) block describes rising-edge storage. Its output updates only on a rising clock edge and holds the captured value between edges. The resulting flip-flop adds a one-edge sampling boundary even when the right-hand expression matches a combinational block.

Read the sensitivity list before reading the expression. Ask whether the specification needs an immediate response or a stored, edge-aligned result. This timing intent is more important than whether two lines of arithmetic happen to look alike.