Basic Decoder
How a binary-to-one-hot decoder works in Verilog, and why default-at-top matters even on a multi-bit output bus.
Updated 2026-07-07
A decoder converts a binary select input into a one-hot output: for any valid select value, exactly one output line is high and every other line is low. A 2-to-4 decoder takes a 2-bit select input and drives a 4-bit one-hot output bus.
The default-assignment-at-top pattern still applies, even though the output here is a multi-bit bus rather than a single wire. Assigning the whole output bus to all-zero first, then letting a case statement set exactly one bit high for the matching select value, guarantees no latch and guarantees no more than one bit is ever accidentally left high from a previous evaluation.
One-hot outputs are useful precisely because only one line is ever active: downstream logic can safely treat each output line as an independent enable signal without worrying about more than one being asserted at once.