Register File Basics

A register file is a small collection of registers accessed by address. A write port names a destination address and a value to store; a read port names the stored value to make available to the rest of the datapath.

In the simple style used in this course, writes occur on a clock edge when a write-enable signal is asserted. Reads are combinational: changing the read address selects a different already-stored value without waiting for another edge.

This combination supports an RTL rhythm: read operands from storage, compute a result through combinational logic, then write the result back into storage on a later edge.