Module 6 Checkpoint

Module 6 joins several habits into one verification loop:

• Compare expected and observed behavior and find the first divergence.
• Reduce the failing behavior to the smallest deterministic case.
• Read tool warnings as structural evidence.
• Test boundaries and unusual control conditions, not only ordinary values.
• Review AI-generated RTL as an untrusted draft.

Earlier modules supply the design patterns that make those habits useful. A defensive FSM default gives an unexpected state a known recovery route. A datapath write-enable signal determines whether a register captures a new result or holds its current value.

When a checkpoint item reaches back to an earlier module, connect it to the current debugging workflow. The purpose is not isolated recall; it is recognizing which design promise to inspect when observed behavior departs from the specification.