Module 1 Checkpoint — Further Reading

The Module 1 Checkpoint confirms that you can predict, simulate, and reflect on a combinational circuit — the same skills you practised in Lessons 1.1 through 1.8.

What you demonstrated:

• Reading a truth table and predicting a gate's output before running it.
• Running a synthesisable Verilog testbench and interpreting simulation output.
• Articulating why the circuit behaves the way it does.

If any stage felt shaky, revisit the lesson it draws from:

Stage	Skill	Source lesson
Predict	Truth-table reasoning	Lesson 1.2
Run	Simulation & testbench reading	Lesson 1.4
Reflect	Articulating combinational behaviour	Lesson 1.8

Up next: Module 2 introduces sequential logic — flip-flops, registers, and state machines. The combinational foundation you built here is exactly what you need to reason about what happens between clock edges.